Dr. Zishu He
This paper is about design and implementation of a Channelized Receiver with Xilinx Virtex 5 FPGA. I designed the hardware and FPGA code.
Recommended citation: Zhongyuan Zhao, (2009). “Design and Implementation of Channelized Digital Receiver based on PCI-Express,” M.S. Thesis. University of Electronic Science and Technology of China, P.R.China